About this event
High-Level Synthesis allows us to take our C++ / C models and high-level Vitis libraries to accelerate the development our programmable logic solution. In this workshop, we will walk through several design examples while introducing key points of developing an HLS Solution.
In this workshop, attendees will learn:
This will be a hands-on workshop with step-by-step instructions to help attendees grow in confidence and capability when using HLS in their designs.
If you want to follow along make sure you have Vitis 2021.2 installed available here
Hosted by
Adam Taylor is a chartered engineer and fellow of the Institute of Engineering and Technology. He is an expert in FPGA and Embedded Systems design, with a specialization in high-reliability design.
Founded in 2014, Adiuvo Engineering & Training, Ltd. is a consultancy that provides embedded systems design, training, and marketing services. Our aim is to help create better engineering AND better engineers.